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2010-10-06 - Colloque/Article dans les actes avec comité de lecture - Anglais - 6 page(s)

Da Cunha Possa Paulo, El Hadhri Zied, Valderrama Carlos , "Image and video processing on FPGAs" in IFAC Workshop on Programmable Devices and Embedded Systems PDeS 2010, 1, 75-80, Pszczyna, Poland, 2010

  • Codes CREF :
  • Unités de recherche UMONS : Génie Electrique (F101), Electronique et Microélectronique (F109)
  • Instituts UMONS : Institut des Sciences et du Management des Risques (Risques)

Abstract(s) :

(Anglais) This work presents a design framework for real-time image and video processing enabling exploration and evaluation of different processing techniques. The goal of our educational approach is to develop a flexible and easily customizable environment for prototyping different processing techniques on Field Programmable Gate Arrays (FPGAs), targeting specific applications. In this paper we give an overview of different requirements and techniques of video processing featuring FPGAs. Three real-time video processing algorithms were combined to show the advantages and characteristics of our approach. Within the framework, the modules running in parallel can be easily swapped at run-time according to the application specific needs.