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2008-10-15 - Colloque/Article dans les actes avec comité de lecture - Anglais - page(s)

Jojczyk Laurent , Valderrama Carlos , "The road-network on chip (R-NoC)" in Andescon 2008 - Bi-annual Conference of the Andean Council of the IEEE, Cuzco, Pérou, 2008

  • Codes CREF : Electricité courants forts (DI2400), Electricité courants faibles (DI2500)
  • Unités de recherche UMONS : Electronique et Microélectronique (F109)

Abstract(s) :

(Anglais) Abstract—Current NoC solutions are often small replicas of bigger communication networks. It is due to the reappearance of already resolved problems at a different scale. This paper proposes a new view for NoC: the R-NoC. The Road-Network on Chip is inspired from another network where we can also find congestion and optimization problems: the road networks. In this background, the traffic management was resolved by different and well-known solutions. In summarize, the R-NoC is an adapted model of the road network using its typical components like traffic light switching, big city infrastructure repartition, highway capabilities and priorities. This new design reduces the number of internal buffers and standardizes the latency between two network entries, as main contributions.